/*
 test for standard primitives: n_input_gates
 and, or, xor, nor, nand, xnor 
*/

module cucu;

reg [11:0] r1, r0;
wire [11:0] w;

and aa  (w[0], r1[0], r0[0]);
and aaa (w[1], r1[1], r0[1]);

nand na [1:0] (w[3:2], r1[3:2], r0[3:2]);

or oo [1:0] (w[5:4], r1[5:4], r0[5:4]);
nor no [1:0] (w[7:6], r1[7:6], r0[7:6]);

xor xo [1:0] (w[9:8], r1[9:8], r0[9:8]);
xnor nxo [1:0] (w[11:10], r1[11:10], r0[11:10]);


initial begin
$display("w\t\tr1\t\tr0\n----------------------------------------------------"); 
$strobe("%b\t%b\t%b", w, r1, r0);
r1 = 0;
r0 = 0;
#1;
$strobe("%b\t%b\t%b", w, r1, r0);
r0 = 12'b1111_1111_1111;
#1;
$strobe("%b\t%b\t%b", w, r1, r0);
r1 = 12'b1111_1111_1111;
r0 = 0;
#1;
$strobe("%b\t%b\t%b", w, r1, r0);
r0 = 12'b1111_1111_1111;
#1;
end
endmodule
